Faculty of Health, Engineering and Science

School: Engineering

This unit information may be updated and amended immediately prior to semester. To ensure you have the correct outline, please check it again at the beginning of semester.

  • Unit Title

    Digital Electronics
  • Unit Code

    ENS6154
  • Year

    2015
  • Enrolment Period

    1
  • Version

    1
  • Credit Points

    15
  • Full Year Unit

    N
  • Mode of Delivery

    On Campus

Description

This unit provides students with an introduction to digital electronics. Memory functions, memory types, and the design of large memory arrays are explained and programmable logic devices are introduced. Digital design and analysis methods, top-down design, algorithmic state machines (ASM), synthesis of ASM, sequencing and control and CPU (Central Processing Unit) design are covered. An introduction to HDL (Hardware Description Language), and simulation and testing of digital systems is also included.

Equivalent Rule

Unit was previously coded ENS5256

Learning Outcomes

On completion of this unit students should be able to:

  1. Analyse a simple CPU.
  2. Describe digital logic using a Hardware Description Language (HDL).
  3. Describe digital systems as algorithmic state machines (ASMs).
  4. Design a simple CPU.
  5. Design digital systems with application of appropriate Design for Test methodologies.
  6. Research new developments in the field of digital electronics and reflect critically on their significance to engineering practice.
  7. Synthesise an algorithmic state machine.
  8. Test digital systems.
  9. Use a modern Integrated Software Environment (ISE) for digital design.
  10. Use the building blocks of digital systems, including programmable logic devices.

Unit Content

  1. Algorithmic state machines (ASM); synthesis of ASM.
  2. Design For Test (DFT) in digital systems.
  3. Digital design and analysis methods; top-down design.
  4. Digital logic families technology review.
  5. Engineering design environment.
  6. Introduction to VHDL.
  7. Joint Testing Action Group (JTAG), scan pass, Built In Self Test (BIST) advanced testing techniques.
  8. Memory as major component of digital systems memory types, large memory arrays.
  9. Programmable logic devices (FPGAs, CPLBs).
  10. Sequencing and control; design of CPU.
  11. Simulation and testing of digital systems.
  12. VHDL description of combinational and sequential logic.

Additional Learning Experience Information

Seminars and laboratories.

Assessment

GS1 GRADING SCHEMA 1 Used for standard coursework units

Students please note: The marks and grades received by students on assessments may be subject to further moderation. All marks and grades are to be considered provisional until endorsed by the relevant Board of Examiners.

ON CAMPUS
TypeDescriptionValue
TestIn class tests30%
Laboratory Work ^Laboratory work and reports20%
PresentationResearch seminar10%
Examination ^End of semester examination40%

^ Mandatory to Pass

Text References

  • ^ Vahid, F. (2011). Digital design with RTL design, VHDL, and Verilog (2nd ed.). New Jersey, NJ: John Wiley.
  • Zwolinski, M. (2004). Digital system design with VHDL. Sydney, Australia: Prentice Hall.
  • Rushton, A. (2011). VHDL for logic synthesis (3rd ed.). Brisbane, Australia: John Wiley & Sons, Inc.
  • Balabanian, N., & Carlson, B. (2007). Digital logic design principles. Brisbane, Australia: John Wiley & Sons, Inc.
  • Brown, S., & Varnesic, Z. (2008). Fundamentals of digital logic with VHDL design (3rd ed.). Sydney, Australia: McGraw Hill.

^ Mandatory reference


Disability Standards for Education (Commonwealth 2005)

For the purposes of considering a request for Reasonable Adjustments under the Disability Standards for Education (Commonwealth 2005), inherent requirements for this subject are articulated in the Unit Description, Learning Outcomes and Assessment Requirements of this entry. The University is dedicated to provide support to those with special requirements. Further details on the support for students with disabilities or medical conditions can be found at the Access and Inclusion website.

Academic Misconduct

Edith Cowan University has firm rules governing academic misconduct and there are substantial penalties that can be applied to students who are found in breach of these rules. Academic misconduct includes, but is not limited to:

  • plagiarism;
  • unauthorised collaboration;
  • cheating in examinations;
  • theft of other students' work;

Additionally, any material submitted for assessment purposes must be work that has not been submitted previously, by any person, for any other unit at ECU or elsewhere.

The ECU rules and policies governing all academic activities, including misconduct, can be accessed through the ECU website.

ENS6154|1|1

Faculty of Health, Engineering and Science

School: Engineering

This unit information may be updated and amended immediately prior to semester. To ensure you have the correct outline, please check it again at the beginning of semester.

  • Unit Title

    Digital Electronics
  • Unit Code

    ENS6154
  • Year

    2015
  • Enrolment Period

    2
  • Version

    1
  • Credit Points

    15
  • Full Year Unit

    N
  • Mode of Delivery

    On Campus

Description

This unit provides students with an introduction to digital electronics. Memory functions, memory types, and the design of large memory arrays are explained and programmable logic devices are introduced. Digital design and analysis methods, top-down design, algorithmic state machines (ASM), synthesis of ASM, sequencing and control and CPU (Central Processing Unit) design are covered. An introduction to HDL (Hardware Description Language), and simulation and testing of digital systems is also included.

Equivalent Rule

Unit was previously coded ENS5256

Learning Outcomes

On completion of this unit students should be able to:

  1. Analyse a simple CPU.
  2. Describe digital logic using a Hardware Description Language (HDL).
  3. Describe digital systems as algorithmic state machines (ASMs).
  4. Design a simple CPU.
  5. Design digital systems with application of appropriate Design for Test methodologies.
  6. Research new developments in the field of digital electronics and reflect critically on their significance to engineering practice.
  7. Synthesise an algorithmic state machine.
  8. Test digital systems.
  9. Use a modern Integrated Software Environment (ISE) for digital design.
  10. Use the building blocks of digital systems, including programmable logic devices.

Unit Content

  1. Algorithmic state machines (ASM); synthesis of ASM.
  2. Design For Test (DFT) in digital systems.
  3. Digital design and analysis methods; top-down design.
  4. Digital logic families technology review.
  5. Engineering design environment.
  6. Introduction to VHDL.
  7. Joint Testing Action Group (JTAG), scan pass, Built In Self Test (BIST) advanced testing techniques.
  8. Memory as major component of digital systems memory types, large memory arrays.
  9. Programmable logic devices (FPGAs, CPLBs).
  10. Sequencing and control; design of CPU.
  11. Simulation and testing of digital systems.
  12. VHDL description of combinational and sequential logic.

Additional Learning Experience Information

Seminars and laboratories.

Assessment

GS1 GRADING SCHEMA 1 Used for standard coursework units

Students please note: The marks and grades received by students on assessments may be subject to further moderation. All marks and grades are to be considered provisional until endorsed by the relevant Board of Examiners.

ON CAMPUS
TypeDescriptionValue
TestIn class tests30%
Laboratory Work ^Laboratory work and reports20%
PresentationResearch seminar10%
Examination ^End of semester examination40%

^ Mandatory to Pass

Text References

  • ^ Vahid, F. (2011). Digital design with RTL design, VHDL, and Verilog (2nd ed.). New Jersey, NJ: John Wiley.
  • Zwolinski, M. (2004). Digital system design with VHDL. Sydney, Australia: Prentice Hall.
  • Rushton, A. (2011). VHDL for logic synthesis (3rd ed.). Brisbane, Australia: John Wiley & Sons, Inc.
  • Balabanian, N., & Carlson, B. (2007). Digital logic design principles. Brisbane, Australia: John Wiley & Sons, Inc.
  • Brown, S., & Varnesic, Z. (2008). Fundamentals of digital logic with VHDL design (3rd ed.). Sydney, Australia: McGraw Hill.

^ Mandatory reference


Disability Standards for Education (Commonwealth 2005)

For the purposes of considering a request for Reasonable Adjustments under the Disability Standards for Education (Commonwealth 2005), inherent requirements for this subject are articulated in the Unit Description, Learning Outcomes and Assessment Requirements of this entry. The University is dedicated to provide support to those with special requirements. Further details on the support for students with disabilities or medical conditions can be found at the Access and Inclusion website.

Academic Misconduct

Edith Cowan University has firm rules governing academic misconduct and there are substantial penalties that can be applied to students who are found in breach of these rules. Academic misconduct includes, but is not limited to:

  • plagiarism;
  • unauthorised collaboration;
  • cheating in examinations;
  • theft of other students' work;

Additionally, any material submitted for assessment purposes must be work that has not been submitted previously, by any person, for any other unit at ECU or elsewhere.

The ECU rules and policies governing all academic activities, including misconduct, can be accessed through the ECU website.

ENS6154|1|2