Handbook : Unit informationEdith Cowan University

School: Engineering

This unit information may be updated and amended immediately prior to semester. To ensure you have the correct outline, please check it again at the beginning of semester.

• Unit Title

  Digital Electronics

• Unit Code

  ENS6154

• Year

  2021

• Enrolment Period

  1

• Version

  1

• Credit Points

  15

• Full Year Unit

  N

• Mode of Delivery

  On Campus
  Online

• Unit Coordinator

  Dr Quoc Viet PHUNG

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Description

This unit provides students with an introduction to digital electronics. Memory functions, memory types, and the design of large memory arrays are explained and programmable logic devices are introduced. Digital design and analysis methods, top-down design, algorithmic state machines (ASM), synthesis of ASM, sequencing and control and CPU (Central Processing Unit) design are covered. An introduction to HDL (Hardware Description Language), and simulation and testing of digital systems is also included.

Equivalent Rule

Unit was previously coded ENS5256

Learning Outcomes

On completion of this unit students should be able to:

1. Analyse a simple CPU.
2. Describe digital logic using a Hardware Description Language (HDL).
3. Describe digital systems as algorithmic state machines (ASMs).
4. Design a simple CPU.
5. Design digital systems with application of appropriate Design for Test methodologies.
6. Research new developments in the field of digital electronics and reflect critically on their significance to engineering practice.
7. Synthesise an algorithmic state machine.
8. Test digital systems.
9. Use a modern Integrated Software Environment (ISE) for digital design.
10. Use the building blocks of digital systems, including programmable logic devices.

Unit Content

1. Algorithmic state machines (ASM); synthesis of ASM.
2. Design For Test (DFT) in digital systems.
3. Digital design and analysis methods; top-down design.
4. Digital logic families technology review.
5. Engineering design environment.
6. Introduction to VHDL.
7. Joint Testing Action Group (JTAG), scan pass, Built In Self Test (BIST) advanced testing techniques.
8. Memory as major component of digital systems memory types, large memory arrays.
9. Programmable logic devices (FPGAs, CPLBs).
10. Sequencing and control; design of CPU.
11. Simulation and testing of digital systems.
12. VHDL description of combinational and sequential logic.

Learning Experience

ON-CAMPUS

Students will attend on campus classes as well as engage in learning activities through ECUs LMS

For more information see the Semester Timetable

ONLINE

Students will engage in learning experiences through ECUs LMS as well as additional ECU l

Additional Learning Experience Information

Seminars and laboratories.

Assessment

GS1 GRADING SCHEMA 1 Used for standard coursework units

Students please note: The marks and grades received by students on assessments may be subject to further moderation. All marks and grades are to be considered provisional until endorsed by the relevant School Progression Panel.

^ Mandatory to Pass

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